微處理器 - Lattice LCMXO2-1200HC-4MG132C (STEP-MXO2 V1.1) - Verilog - LED


參考資訊：
https://www.stepfpga.com/doc/step-mxo2%E5%85%A5%E9%97%A8%E6%95%99%E7%A8%8B

top.v 

module main (
    input clk,
    output reg led
);
        
reg [23:0] cnt;
        
always @(posedge clk) begin
    if (cnt == 12000000) begin
        cnt = 0;
        led <= ~led;
    end else
        cnt = cnt + 1;
end
endmodule

top.lpf 

LOCATE COMP "led" SITE "A7";
LOCATE COMP "clk" SITE "C1";

Makefile 

all:
	yosys -p "synth_lattice -family xo2 -json top.json" top.v
	nextpnr-machxo2 --device LCMXO2-1200HC-4MG132C --lpf top.lpf --json top.json --textcfg top.txt
	ecppack --compress top.txt top.bit --jed top.jed

ram:
	openFPGALoader -b step-mxo2_v1.1 top.bit

flash:
	openFPGALoader -b step-mxo2_v1.1 top.jed

clean:
	rm -rf top.txt top.bit top.json top.jed

編譯、下載 

$ make
$ make ram

完成