微處理器 - STCmicro STC15W104 - 指令集
| 格式 | 週期 |
|---|
| ADD A, Rn | 1 |
| ADD A, direct | 2 |
| ADD A, @Ri | 2 |
| ADD A, #data | 2 |
| ADDC A, Rn | 2 |
| ADDC A, direct | 1 |
| ADDC A, @Ri | 2 |
| ADDC A, #data | 2 |
| SUBB A, Rn | 1 |
| SUBB A, direct | 2 |
| SUBB A, @Ri | 2 |
| SUBB A, #data | 2 |
| INC A | 1 |
| INC Rn | 2 |
| INC direct | 3 |
| INC @Ri | 3 |
| DEC A | 1 |
| DEC Rn | 2 |
| DEC direct | 3 |
| DEC @Ri | 3 |
| INC DPTR | 1 |
| MUL AB | 2 |
| DIV AB | 6 |
| DA A | 3 |
| ANL A, Rn | 1 |
| ANL A, direct | 2 |
| ANL A, @Ri | 2 |
| ANL A, #data | 2 |
| ANL direct, A | 3 |
| ANL direct, #data | 3 |
| ORL A, Rn | 1 |
| ORL A, direct | 2 |
| ORL A, @Ri | 2 |
| ORL A, #data | 2 |
| ORL direct, A | 3 |
| ORL direct, #data | 3 |
| XRL A, Rn | 1 |
| XRL A, direct | 2 |
| XRL A, @Ri | 2 |
| XRL A, #data | 2 |
| XRL direct, A | 3 |
| XRL direct, #data | 3 |
| CLR A | 1 |
| CPL A | 1 |
| RL A | 1 |
| RLC A | 1 |
| RR A | 1 |
| RRC A | 1 |
| SWAP A | 1 |
| MOV A, Rn | 1 |
| MOV A, direct | 2 |
| MOV A, @Ri | 2 |
| MOV A, #data | 2 |
| MOV Rn, A | 1 |
| MOV Rn, direct | 3 |
| MOV Rn, #data | 2 |
| MOV direct, A | 2 |
| MOV direct, Rn | 2 |
| MOV direct, direct | 3 |
| MOV direct, @Ri | 3 |
| MOV direct, #data | 3 |
| MOV @Ri, A | 2 |
| MOV @Ri, direct | 3 |
| MOV @Ri, #data | 2 |
| MOV DPTR, #data16 | 3 |
| MOVC A, @A+DPTR | 5 |
| MOVC A, @A+PC | 4 |
| MOVX A, @Ri | 3 |
| MOVX @Ri, A | 4 |
| MOVX A, @DPTR | 2 |
| MOVX @DPTR, A | 3 |
| MOVX A, @Ri | 5xN+2 |
| MOVX @Ri, A | 5×N+3 |
| MOVX A, @DPTR | 5×N+1 |
| MOVX @DPTR, A | 5×N+2 |
| PUSH direct | 3 |
| POP direct | 2 |
| XCH A, Rn | 2 |
| XCH A, direct | 3 |
| XCH A, @Ri | 3 |
| XCHD A, @Ri | 3 |
| CLR C | 1 |
| CLR bit | 3 |
| SETB C | 1 |
| SETB bit | 3 |
| CPL C | 1 |
| CPL bit | 3 |
| ANL C, bit | 2 |
| ANL C, /bit | 2 |
| ORL C, bit | 2 |
| ORL C, /bit | 2 |
| MOV C, bit | 2 |
| MOV bit, C | 3 |
| JC rel | 3 |
| JNC rel | 3 |
| JB bit, rel | 5 |
| JNB bit, rel | 5 |
| JBC bit, rel | 5 |
| ACALL addr11 | 4 |
| LCALL addr16 | 4 |
| RET | 4 |
| RETI | 4 |
| AJMP addr11 | 3 |
| LJMP addr16 | 4 |
| SJMP re1 | 3 |
| JMP @A+DPTR | 5 |
| JZ re1 | 4 |
| JNZ re1 | 4 |
| CJNE A, direct, re1 | 5 |
| CJNE A, #data, re1 | 4 |
| CJNE Rn, #data, re1 | 4 |
| CJNE @Ri, #data, re1 | 5 |
| DJNZ Rn, re1 | 4 |
| DJNZ direct, re1 | 5 |
| NOP | 1 |