Steward
分享是一種喜悅、更是一種幸福
微處理器 - Allwinner V3S (Lichee Pi Zero) - Assembly - Timer2
方塊圖
Registers
IRQ Status
Timer2 Ctrl
Timer2 Value
main.s
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 | . global _start . equ GPIO_BASE , 0x01c20800 . equ TIMER_BASE , 0x01c20c00 . equ PG , (0x24 * 6) . equ TMR_IRQ_STA_REG , 0x04 . equ TMR2_CTRL_REG , 0x30 . equ TMR2_INTV_VALUE_REG , 0x34 . equ TMR2_CUR_VALUE_REG , 0x38 . equ CFG0 , 0x00 . equ DATA , 0x10 . arm .text _start : . long 0xea000016 . byte 'e', 'G', 'O', 'N', '.', 'B', ' T ', '0' . long 0, __spl_size . byte 'S', 'P', 'L', 2 . long 0, 0 . long 0, 0, 0, 0, 0, 0, 0, 0 . long 0, 0, 0, 0, 0, 0, 0, 0 _vector : b reset b . b . b . b . b . b . b . reset : ldr r0 , = GPIO_BASE ldr r1 , =1 str r1 , [ r0 , #( PG + CFG0 )] ldr r1 , =1 str r1 , [ r0 , #( PG + DATA )] ldr r2 , = TIMER_BASE ldr r3 , =187500 str r3 , [ r2 , # TMR2_INTV_VALUE_REG ] str r3 , [ r2 , # TMR2_CUR_VALUE_REG ] ldr r3 , =(7 << 4) | (1 << 2) | (1 << 1) | (1 << 0) str r3 , [ r2 , # TMR2_CTRL_REG ] ldr r4 , =(1 << 0) 0: ldr r3 , [ r2 , # TMR_IRQ_STA_REG ] tst r3 , #(1 << 2) beq 0b str r3 , [ r2 , # TMR_IRQ_STA_REG ] eor r1 , r4 str r1 , [ r0 , #( PG + DATA )] b 0b . end |
完成