Steward

分享是一種喜悅、更是一種幸福

微處理器 - Lattice iCE40UP5K-SG48I (ICE40_FPGA_PICO) - VHDL - LED

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參考資訊：
https://github.com/375432636/bin2rbt

LED腳位


top.vhd

library ieee;
use ieee.std_logic_1164.all;
      
entity main is
    port(
        clk : in std_logic;
        led : out std_logic
    );
end main;
      
architecture logic of main is
      
begin
    process(clk) is
        variable cnt : integer := 0;
        variable val: std_logic := '0';
    begin
        if (clk'event and clk = '1') then
            cnt := cnt + 1;
    
            if (cnt = 1000000) then
                cnt := 0;
                led <= val;
                val := not val;
            end if;
        end if;
    end process;
end logic;

top.pcf

set_io clk 35
set_io led 39

Makefile

all:
	yosys -m ghdl -p "ghdl top.vhd -e main; synth_ice40 -json top.json -blif top.blif"
	nextpnr-ice40 --up5k --package sg48 --json top.json --pcf top.pcf --asc top.asc
	icepack top.asc top.bin
	python3 bin2rbt.py --binfile top.bin --rbtfile top.rbt

clean:
	rm -f top.json top.asc top.bin top.rbt

編譯

$ make

將top.rbt複製到新增的隨身碟即可