微處理器 - Lattice LCMXO2-4000HC-4MG132C (STEP-MXO2 V2) - Verilog - LED

參考資訊：
https://www.stepfpga.com/doc/step-mxo2%E5%85%A5%E9%97%A8%E6%95%99%E7%A8%8B

main.v

module main (
    input clk,
    output reg [7:0] led = 8'b11111111
);
       
reg [23:0] cnt;
       
always @(posedge clk) begin
    if (cnt == 1000000) begin
        cnt = 0;
        led <= ~led;
    end else
        cnt = cnt + 1;
end
endmodule

main.lpf

LOCATE COMP "led[0]" SITE "N13";
LOCATE COMP "led[1]" SITE "M12";
LOCATE COMP "led[2]" SITE "P12";
LOCATE COMP "led[3]" SITE "M11";
LOCATE COMP "led[4]" SITE "P11";
LOCATE COMP "led[5]" SITE "N10";
LOCATE COMP "led[6]" SITE "N9";
LOCATE COMP "led[7]" SITE "P9";
LOCATE COMP "clk" SITE "C1";

Makefile

all:
	yosys -p "synth_lattice -family xo2 -json main.json" main.v
	nextpnr-machxo2 --device LCMXO2-4000HC-4MG132C --lpf main.lpf --json main.json --textcfg main.txt
	ecppack --compress main.txt main.bit --jed main.jed

ram:
	openFPGALoader -b step-mxo2_v2 main.bit

flash:
	openFPGALoader -b step-mxo2_v2 main.jed

clean:
	rm -rf main.txt main.bit main.json main.jed

編譯、下載

$ make
$ make ram

完成