微處理器 - Lattice LCMXO2-1200HC-4SG32C - 解決ERROR: No such command: synth_machxo2問題

參考資訊：
https://yosyshq.readthedocs.io/projects/yosys/en/latest/cmd/synth_lattice.html

問題如下：

$ yosys -p "synth_machxo2 -json main.json" main.v
     /----------------------------------------------------------------------------\
     |  yosys -- Yosys Open SYnthesis Suite                                       |
     |  Copyright (C) 2012 - 2024  Claire Xenia Wolf <claire@yosyshq.com>         |
     |  Distributed under an ISC-like license, type "license" to see terms        |
     \----------------------------------------------------------------------------/
     Yosys 0.48+51 (git sha1 17a53b838, clang++ 14.0.6 -fPIC -O3)

    -- Parsing `main.v' using frontend ` -vlog2k' --

    1. Executing Verilog-2005 frontend: main.v
    Parsing Verilog input from `main.v' to AST representation.
    Storing AST representation for module `$abstract\main'.
    Successfully finished Verilog frontend.

    -- Running command `synth_machxo2 -json main.json' --
    ERROR: No such command: synth_machxo2 (type 'help' for a command overview)
    make: *** [Makefile:2: all] Error 1

解法如下：

$ yosys -p "synth_lattice -family xo2 -json main.json" main.v