(FPGA) EG4S20 (Lichee Tang Premier) >> Verilog

LED

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開啟TD

$ xxx/td -gui

New Project...


EG4 EG4S20B256


New Source


main.v

module main(btn, led);
 
input btn;
output led;
assign led = btn;
 
endmodule

Ctrl+S


New


main.adc

set_pin_assignment {btn} {location=k16;}
set_pin_assignment {led} {location=r3;}

Ctrl+S


Add ADC File


main.adc


Run


led.bit


Download


燒錄頁面


接著滑鼠點一下main.bit，讓Run按鈕可以顯示


按下Run燒錄(假如要燒錄到Flash記憶體，請把Mode從JTAG改成PROGRAM FLASH)


完成

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