FC3000 >> Assembly
CCU
參考資料：
1. pdf
2. lichee
3. mangopi_r
4. allwinner
5. i2c-sunxi.c
System Bus
Bus Clock Tree
Base Address
暫存器
速度
| 模組 | 預設 | 範圍 |
|---|---|---|
| CPU | 408MHz | 200MHz~2.6GHz |
| AUDIO | 24.571MHz | 20MHz~200MHz |
| VIDEO | 297MHz | 30MHz~600MHz |
| VE | 210MHz | 30MHz~600MHz |
| DDR | 312MHz | 24MHz~3GHz |
| PERIPH | 600MHz | 200MHz~1.8GHz |
CPU速度計算公式
PLL = (24MHz*N*K)/(M*P) N = 30 K = 1 M = 1 P = 1 PLL = (24MHz*30*1)/(1*1) = 720MHz
main.s
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 | .global _start .equiv CCU_BASE, 0x01c20000 .equiv PIO_BASE, 0x01c20800 .equiv PD, (0x24 * 3) .equiv PE, (0x24 * 4) .equiv PIO_CFG0, 0x00 .equiv PIO_CFG1, 0x04 .equiv PIO_CFG2, 0x08 .equiv PIO_DATA, 0x10 .equiv PLL_CPU_CTRL_REG, 0x0000 .equiv PLL_PERIPH_CTRL_REG, 0x0028 .equiv CPU_CLK_SRC_REG, 0x0050 .equiv AHB_APB_HCLKC_CFG_REG, 0x0054 .equiv BUS_CLK_GATING_REG2, 0x0068 .equiv BUS_SOFT_RST_REG2, 0x02d0 .equiv LCD_CS, (1 << 21) .equiv LCD_RD, (1 << 20) .equiv LCD_RS, (1 << 19) .equiv LCD_WR, (1 << 18) .equiv LCD_RST, (1 << 11) .equiv LCD_BL, (1 << 6) .arm .text_start: .long 0xea000016 .byte 'e', 'G', 'O', 'N', '.', 'B', 'T', '0' .long 0, __spl_size .byte 'S', 'P', 'L', 2 .long 0, 0 .long 0, 0, 0, 0, 0, 0, 0, 0 .long 0, 0, 0, 0, 0, 0, 0, 0 _vector: b reset b . b . b . b . b . b . b . reset: bl lcd_init ldr r0, =CCU_BASE ldr r1, =(1 << 31) | (29 << 8) str r1, [r0, #PLL_CPU_CTRL_REG]1: ldr r1, [r0, #PLL_CPU_CTRL_REG] tst r1, #(1 << 28) beq 1b ldr r0, =CCU_BASE ldr r1, =(3 << 16) str r1, [r0, #CPU_CLK_SRC_REG] ldr r0, =0xf800 bl lcd_color b .delay: push {lr}0: subs r0, #1 bne 0b pop {pc} lcd_rst: push {r4, r5, lr} ldr r4, =PIO_BASE + PE ldr r5, =0xffffffff bic r5, #LCD_RST str r5, [r4, #PIO_DATA] ldr r0, =10000 bl delay orr r5, #LCD_RST str r5, [r4, #PIO_DATA] ldr r0, =10000 bl delay pop {r4, r5, pc} lcd_wr: push {r4, r5, lr} ldr r4, =PIO_BASE + PD and r2, r0, #0x00ff and r3, r0, #0xff00 lsl r2, #1 lsl r3, #2 eor r5, r5 orr r5, r1 orr r5, r2 orr r5, r3 orr r5, #LCD_RD str r5, [r4, #PIO_DATA] orr r5, #LCD_WR str r5, [r4, #PIO_DATA] pop {r4, r5, pc} lcd_dat: push {lr} mov r1, #LCD_RS bl lcd_wr pop {pc} lcd_cmd: push {lr} mov r1, #0 bl lcd_wr pop {pc}lcd_color: push {r4, r5, lr} ldr r4, =320*240 mov r5, r00: mov r0, r5 bl lcd_dat subs r4, #1 bne 0b pop {r4, r5, pc} lcd_init: push {r4, lr} ldr r4, =PIO_BASE + PD ldr r1, [r4, #PIO_CFG0] bic r1, #0xfffffff0 ldr r2, =0x11111110 orr r1, r2 str r1, [r4, #PIO_CFG0] ldr r1, [r4, #PIO_CFG1] bic r1, #0xffffff0f ldr r2, =0x11111101 orr r1, r2 str r1, [r4, #PIO_CFG1] ldr r1, [r4, #PIO_CFG2] bic r1, #0x00ffffff ldr r2, =0x00111111 orr r1, r2 str r1, [r4, #PIO_CFG2] ldr r4, =PIO_BASE + PE ldr r1, [r4, #PIO_CFG0] bic r1, #0x0f000000 orr r1, #0x01000000 str r1, [r4, #PIO_CFG0] ldr r1, [r4, #PIO_CFG1] bic r1, #0x0000f000 orr r1, #0x00001000 str r1, [r4, #PIO_CFG1] ldr r4, =PIO_BASE + PD ldr r1, [r4, #PIO_DATA] ldr r2, =0x003ffdfe orr r1, r2 str r1, [r4, #PIO_DATA] ldr r4, =PIO_BASE + PE ldr r1, [r4, #PIO_DATA] orr r1, #(1 << 11) | (1 << 6) str r1, [r4, #PIO_DATA] bl lcd_rst ldr r0, =0x800 bl lcd_cmd ldr r0, =0x100 bl lcd_dat ldr r0, =0x1000 bl lcd_cmd ldr r0, =0x700 bl lcd_dat ldr r0, =0x1800 bl lcd_cmd ldr r0, =0xc002 bl lcd_dat ldr r0, =0x2000 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x4000 bl lcd_cmd ldr r0, =0x1200 bl lcd_dat ldr r0, =0x4800 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x5000 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x6000 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x6800 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x7800 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x8000 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x8800 bl lcd_cmd ldr r0, =0x3800 bl lcd_dat ldr r0, =0x9000 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x9800 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x3800 bl lcd_cmd ldr r0, =0x800 bl lcd_dat ldr r0, =0x8000 bl lcd_cmd ldr r0, =0x8682 bl lcd_dat ldr r0, =0x8800 bl lcd_cmd ldr r0, =0x3e60 bl lcd_dat ldr r0, =0x9000 bl lcd_cmd ldr r0, =0xc080 bl lcd_dat ldr r0, =0x9800 bl lcd_cmd ldr r0, =0x603 bl lcd_dat ldr r0, =0x4820 bl lcd_cmd ldr r0, =0xf000 bl lcd_dat ldr r0, =0x5820 bl lcd_cmd ldr r0, =0x7000 bl lcd_dat ldr r0, =0x20 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x820 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x8020 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x8820 bl lcd_cmd ldr r0, =0x3d00 bl lcd_dat ldr r0, =0x9020 bl lcd_cmd ldr r0, =0x2000 bl lcd_dat ldr r0, =0xa820 bl lcd_cmd ldr r0, =0x2a00 bl lcd_dat ldr r0, =0xb020 bl lcd_cmd ldr r0, =0x2000 bl lcd_dat ldr r0, =0xb820 bl lcd_cmd ldr r0, =0x3b00 bl lcd_dat ldr r0, =0xc020 bl lcd_cmd ldr r0, =0x1000 bl lcd_dat ldr r0, =0xc820 bl lcd_cmd ldr r0, =0x3f00 bl lcd_dat ldr r0, =0xe020 bl lcd_cmd ldr r0, =0x1500 bl lcd_dat ldr r0, =0xe820 bl lcd_cmd ldr r0, =0x2000 bl lcd_dat ldr r0, =0x8040 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x8840 bl lcd_cmd ldr r0, =0x78e0 bl lcd_dat ldr r0, =0x9040 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x9840 bl lcd_cmd ldr r0, =0xf920 bl lcd_dat ldr r0, =0x60 bl lcd_cmd ldr r0, =0x714 bl lcd_dat ldr r0, =0x860 bl lcd_cmd ldr r0, =0x800 bl lcd_dat ldr r0, =0x5060 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x80 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x880 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x1080 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x1880 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x2080 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x2880 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x8080 bl lcd_cmd ldr r0, =0x8000 bl lcd_dat ldr r0, =0x9080 bl lcd_cmd ldr r0, =0x600 bl lcd_dat ldr r0, =0x1800 bl lcd_cmd ldr r0, =0x4020 bl lcd_dat ldr r0, =0x3800 bl lcd_cmd ldr r0, =0x9920 bl lcd_dat ldr r0, =0x8040 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x8840 bl lcd_cmd ldr r0, =0x78e0 bl lcd_dat ldr r0, =0x9040 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x9840 bl lcd_cmd ldr r0, =0xf920 bl lcd_dat ldr r0, =0x20 bl lcd_cmd ldr r0, =0x78e0 bl lcd_dat ldr r0, =0x820 bl lcd_cmd ldr r0, =0x0 bl lcd_dat ldr r0, =0x1020 bl lcd_cmd pop {r4, pc} .end |
完成
