Visual Memory Unit >> STM32F103 >> 1.5吋 TFT ST7789V 解析度240x240

超頻測試(128MHz)

HSE(8MHZ) * PLL_Mul(16倍) = 128MHz

rcc.s

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  .align 2
  .thumb_func
rcc_config:
  push {lr}
  bl rcc_deinit
  bl rcc_hseconfig
  bl rcc_waitforhsestartup
  bl flash_prefetchbuffercmd
  bl flash_setlatency
  bl rcc_hclkconfig
  bl rcc_pclk2config
  bl rcc_pclk1config
  bl rcc_pllconfig
  bl rcc_pllcmd
  bl rcc_sysclkconfig
  pop {pc}
 
  .align 2
  .thumb_func
rcc_deinit:
  push {lr}
  ldr r0, =RCC_APB2RSTR
  ldr r1, =0x00000000
  str r1, [r0]
   
  ldr r0, =RCC_APB1RSTR
  ldr r1, =0x00000000
  str r1, [r0]
   
  ldr r0, =RCC_AHBENR
  ldr r1, =0x00000014
  str r1, [r0]
   
  ldr r0, =RCC_APB2ENR
  ldr r1, =0x00000000
  str r1, [r0]
 
  ldr r0, =RCC_APB1ENR
  ldr r1, =0x00000000
  str r1, [r0]
   
  ldr r0, =RCC_CR
  ldr r1, [r0]
  orr r1, #0x00000001
  str r1, [r0]
 
  ldr r0, =RCC_CFGR
  ldr r1, [r0]
  ldr r2, =0xf8ff0000
  and r1, r2
  str r1, [r0]
 
  ldr r0, =RCC_CR
  ldr r1, [r0]
  ldr r2, =0xfef6ffff
  and r1, r2
  str r1, [r0]
   
  ldr r0, =RCC_CR
  ldr r1, [r0]
  and r1, #0xfffbffff
  str r1, [r0]
   
  ldr r0, =RCC_CFGR
  ldr r1, [r0]
  and r1, #0xff80ffff
  str r1, [r0]
   
  ldr r0, =RCC_CIR
  ldr r1, =0x00000000
  str r1, [r0]
  pop {pc}
 
  .align 2
  .thumb_func
rcc_hseconfig:
  push {lr}
  ldr r0, =RCC_CR
  ldr r1, [r0]
  and r1, #0xfffaffff
  orr r1, #0x00010000
  str r1, [r0]
  pop {pc}
   
  .align 2
  .thumb_func
rcc_waitforhsestartup:
  push {lr}
  ldr r0, =RCC_CR
0:
  ldr r1, [r0]
  and r1, #0x00020000
  cmp r1, #0x00020000
  bne 0b
  pop {pc}
 
  .align 2
  .thumb_func
rcc_hclkconfig:
  push {lr}
  ldr r0, =RCC_CFGR
  ldr r1, [r0]
  and r1, #0xffffff0f
  str r1, [r0]
  pop {pc}
   
  .align 2
  .thumb_func
rcc_pclk2config:
  push {lr}
  ldr r0, =RCC_CFGR
  ldr r1, [r0]
  and r1, #0xffffc7ff
  str r1, [r0]
  pop {pc}
   
  .align 2
  .thumb_func
rcc_pclk1config:
  push {lr}
  ldr r0, =RCC_CFGR
  ldr r1, [r0]
  and r1, #0xfffff8ff
  orr r1, #0x00000400
  str r1, [r0]
  pop {pc}
   
  .align 2
  .thumb_func
rcc_pllconfig:
  push {lr}
  ldr r0, =RCC_CFGR
  ldr r1, [r0]
  and r1, #0xffc0ffff
  orr r1, #0x00190000 @ 8MHz*8 = 64MHz
  @orr r1, #0x001d0000 @ 8MHz*9 = 72MHz
  @orr r1, #0x003d0000 @ 8MHz*16 = 128MHz
  str r1, [r0]
  pop {pc}
   
  .align 2
  .thumb_func
rcc_pllcmd:
  push {lr}
  ldr r0, =RCC_CR
  ldr r1, [r0]
  orr r1, #0x01000000
  str r1, [r0]
0:
  ldr r1, [r0]
  and r1, #0x02000000
  cmp r1, #0x02000000
  bne 0b
  pop {pc}
 
  .align 2
  .thumb_func
rcc_sysclkconfig:
  push {lr}
  ldr r0, =RCC_CFGR
  ldr r1, [r0]
  and r1, #0xfffffffc
  orr r1, #0x00000002
  str r1, [r0]
0:
  ldr r1, [r0]
  and r1, #0x00000008
  cmp r1, #0x00000008
  bne 0b
  pop {pc}
  .end

flash.s

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  .align
  .thumb_func
flash_prefetchbuffercmd:
  push {lr}
  ldr r0, =FLASH_ACR
  ldr r1, [r0]
  and r1, #0xffffffef
  orr r1, #0x00000010
  str r1, [r0]
  pop {pc}
   
  .align
  .thumb_func
flash_setlatency:
  push {lr}
  ldr r0, =FLASH_ACR
  ldr r1, [r0]
  and r1, #0x00000038
  orr r1, #0x00000002
  str r1, [r0]
  pop {pc}
  .end

調用

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  .align 2
  .thumb_func
main:
  bl rcc_config


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